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PIC16F62X
DS40300C-page 116
Preliminary
2003 Microchip Technology Inc.
MOVWF
Move W to f
Syntax:
[ label ]
MOVWF
f
Operands:
0
≤ f ≤ 127
Operation:
(W)
→ (f)
Status Affected:
None
Encoding:
00
0000
1fff
ffff
Description:
Move data from W register to
register 'f'.
Words:
1
Cycles:
1
Example
MOVWF
REG1
Before Instruction
REG1 = 0xFF
W
= 0x4F
After Instruction
REG1 = 0x4F
W
= 0x4F
NOP
No Operation
Syntax:
[ label ]
NOP
Operands:
None
Operation:
No operation
Status Affected:
None
Encoding:
00
0000
0xx0
0000
Description:
No operation.
Words:
1
Cycles:
1
Example
NOP
OPTION
Load Option Register
Syntax:
[ label ]
OPTION
Operands:
None
Operation:
(W)
→ OPTION
Status Affected:
None
Encoding:
00
0000
0110
0010
Description:
The contents of the W register are
loaded in the OPTION register.
This instruction is supported for
code compatibility with PIC16C5X
products. Since OPTION is a
readable/writable register, the
user can directly address it. Using
only register instruction such as
MOVWF.
Words:
1
Cycles:
1
Example
To maintain upward compatibil-
ity with future PICmicro prod-
ucts, do not use this
instruction.
RETFIE
Return from Interrupt
Syntax:
[ label ]
RETFIE
Operands:
None
Operation:
TOS
→ PC,
1
→ GIE
Status Affected:
None
Encoding:
00
0000
1001
Description:
Return from Interrupt. Stack is
POPed and Top of Stack (TOS)
is loaded in the PC. Interrupts
are enabled by setting Global
Interrupt Enable bit, GIE
(INTCON<7>). This is a two-
cycle instruction.
Words:
1
Cycles:
2
Example
RETFIE
After Interrupt
PC = TOS
GIE = 1
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